## 職缺一覽 ##
Senior Compiler/Virtual Machine Engineer (Blockchain)
Junior Compiler/Virtual Machine Engineer (Blockchain)
Embedded Software Engineer/Manager
C/C++ Programmer
Senior FPGA (Design) Engineer
Senior Logic Designer/Manager
職缺傳送門： https://blog.skymizer.com/jobs2019/
履歷請寄到： [email protected]
## 徵才公司/統編 ##
Skymizer :http://www.skymizer.com/
臺灣發展軟體科技股份有限公司/ 54309531
## 徵才連結 ##
https://blog.skymizer.com/jobs2019/
## 關於我們 ##
Skymizer 是頂尖的編譯與虛擬化技術團隊，幫助客戶建立各式的虛擬機與編
譯器，增加軟體效能、縮短 time-to-market 時間；目前我們已與世界級的
公司合作，一起開發供深度學習 (deep learning) ASIC 使用的編譯器，與
新一代區塊鏈上的智能合約 (smart contract) 所使用的虛擬機。除了內部
產品，也積極開發及參與 Open Source 的專案。我們熱愛技術、想透過我們
的雙手讓軟體界變得更好，為此，需要你的加入！
## 關於工作 ##
在 Skymizer，你可以鑽研最先進的技術，從創造當中得到十足的快樂；享受
推理解謎的迷人樂趣，並將之發揮到淋灕盡致。最棒的是，你將和許多科技
狂熱的強者一起共事與學習，一起創造下一代的 Compiler 工具與技術。了
解未來最好的方式就是和一群神人一起創造它，你會與一些怪才與技術狂熱
者一起工作。
## 職缺一覽 ##
Senior Compiler/Virtual Machine Engineer (Blockchain)
Responsibilities:
* Design and implement virtual machines for blockchain applications
* Design and build compilers for Domain Specific Language
* Design and implement new languages for blockchain applications
Requirements:
* Mastery over C and C++
* Familiar with LLVM framework
* Familiar with UNIX system programming
* Familiar with Open Source Culture
* Deep understanding of compiler, virtual machine, and runtime
Bonus:
* Familiar with Ethereum
* Familiar with any consensus protocol (e.g. Tendermint, Stellar)
Junior Compiler/Virtual Machine Engineer (Blockchain)
Responsibilities:
* Enhance existing compilers and virtual machines
for blockchain applications
* Design and Implement virtual machine components
* Design and implement static analysis tools and compiler
optimization passes
Requirements:
* Familiar with C and C++
* Deep understanding of Computer Science fundamentals
* An understanding of compiler and virtual machine
Bonus
* Experienced with UNIX system programming
* Experienced with LLVM framework
* Experienced with Ethereum
* Experienced with several consensus protocols (e.g. Tendermint, Stellar)
* Experienced with Open Source Culture
Embedded Software Engineer/Manager
Responsibilities:
* Design & develop easy-to-port deep learning runtime for variant customer
* Develop neural network SDK or toolchain for specific platform with MCU or
application processor
* Develop neural network model quantization flow
* Customize runtime, SDK and toolchain for different targets of customers
* System analysis of features, performance, problems
* Lead team members and projects (for manager position)
Requirements:
* Familiar with deep learning inferencing
* Ablility to build & port Deep Learning SDK, software stack for variant
platforms.
* Experience in RTOS application development
* Experience in linux driver development
* Experience in MCU / DSP usage.
* Good knowledge about MCU/embedded debugging.
C/C++ Programmer
Job Statement:
C/C++ Programmer is responsible for designing , developing , testing ,
deploying, maintaining software
* Build up ONNC runtime library
* Porting PyTorch to ONNC
Job Description:
Master over C and C++ programming
Familiar with Unix environments, including but not limited on Ubuntu,
CentOS,MacOSX, and FreeBSD.
Familiar with Open Source Culture
Senior FPGA (Design) Engineer
Job Statement:
The Senior FPGA (Design) Engineer will work at the system architecture level
in multiple areas of the system as an expert in one or more significant
technology domains and will serve as a technical expert in designing,
developing, and testing software for optical transport cards using FPGAs
(embedded processors) that carry a variety of data types.
Job Description:
Responsibilities:
* Design, development and test of software for deep learning accelerators
using Field Programmable Gate Arrays (FPGAs)(with embedded processors)
* Position involves writing code in Register Transfer Level (RTL)
and system integration for FPGA’s
* The position requires interaction with other System, Hardware, Firmware,
and Software developers.
Requirements:
* Preferred Degree Qualifications: Bachelor of Science (BS) or Master of
Science (MS) Degree in computer engineering or electrical engineering
* Preferred Years of Experience: BS+ (8 to 15) years, MS+(5 to 12) years
* Previous experience with Large FPGA, ASIC, or Application Specific
Standard Product (ASSP) designs or previous experience verifying complex
* Application Specific Integrated Circuits/Field Programmable Gate Arrays
(ASICs/FPGAs) using C/C++ or System Verilog
Senior Logic Designer/Manager
Self-motivated character and can work under pressure to achieve the goal.
Good communication and teamwork experience/skills
Flexibility to perform different roles throughout the project and
continuously upgrade your skills
You will also be:
* Design and developing of functional units of NN with RTL.
* Integrating a NN SoC at logic/RTL level
* Architecting a NN architecture for deep learning
* Performing all aspect of logic-design flow
Qualifications:
* Experienced with RTL/logic design
* Passion with logic design and architecture
* Passion with AI
* MS or PhD degree of EE/CS, or related background
職缺傳送門： https://blog.skymizer.com/jobs2019/
## 公司地址 ##
台北市內湖區瑞光路408號12F-2
## 公司員工是否自備工作工具 ##
否
## 薪資 ##
月薪 60000 ~ 150000 元，薪資保障 14 個月。股票或股票選擇權另議。
## 上班時間 ##
10:00~19:00 表定八小時，可彈性調整（早上班就早下班，晚上班就晚下班
中間休息時間自行決定）
## 平均每週工時 ##
8*5=40小時
## 加班費制度 ##
如有加班比照勞基法給予加班費或依個人意願選擇補休。
我們重視效率遠勝於工時，公司並不鼓勵加班。
## 員工福利 ##
* 彈性的上下班時間，自由的工作環境與風格。
* Skymizer 就是你自己的公司，你可以把環境打造你喜歡的舒適樣子
* 護眼的雙螢幕、最頂級的升降桌與人體工學椅，自行挑選的滑鼠與鍵盤，還
有你想看就可以買的書。
* 每年健康檢查及團體保險。
* 我們還蠻常出遊的，以及有事沒事就會一起玩桌遊，就算沒有加入我們，還
是歡迎一起來打桌遊！
* 工作滿一年即給予特休 14 天，每多任職一年會多一天。特休按在職比例計
算，於每年初預先發放，未滿一年亦同。
* 彈性休假：遇到連假補班日不須補班，並且每年額外享有 4 天可自由安排的
彈性休假。
* 每年 3 天全薪病假。
* 同性伴侶註記視同登記，同享婚假、產假/陪產假、家庭照顧假…等。
* 有貢獻就要有收獲！我們會讓最有貢獻的人才有最大的回報。
* 公司有貓，[住在 RD 部門的貓] https://www.facebook.com/hachu.cat/
期待你來認識我們，簡歷請寄到 [email protected]。